Important Terms and Definitions

Unit Conversion Site

1 hertz
1 second
1 KiloHertz
.001 second
10 KiloHertz
.0001 second
100 KiloHertz
.0001 second,1.0E-5
1 MegaHertz
.00001 second,1.0E-6
10 MegaHertz
.000001 second,1.0E-7
50 MegaHertz
.0000002 second,2.0E-8, 20 nano seconds
100 MegaHertz
.0000001 second,1.0E-8
38kHz
26.3┬Ás
AXI
Advanced eXtensible Interface
bdf
Block Design File
HDL
Hardware Description Language
HPS
Hard Processer System
HSTC
High-Speed Terasic connector/dd>
HSMC
High-Speed Mezzanine connector
lpm
Library of Parameterized Modules
lsb
Least Significant Bit
qsf
Quartus II Settings File
qpf
Quartus II Project File
msb
Most Significant Bit
PLL
Phase-Locked Loop
sof
SRAM Object File
sdc
Synopsys Design Constraints File
sym
Symbol File
JIC
JTAG Indirect Configuration File

DE1-SoC My First FPGA PDF manual

Design FlowDesign Flow

Finished screenshot of My First Fpga bdfScreenshot of My First FPGA BDF

Pin Planner Top ViewScreenshot of Pin Planner Top View

All directions are for use with the above manual
  • Recommend using NO spaces within element names; i.e.: counter[26..23]
  • bus name notation is [X..Y]
    1. X is the most significant bit, MSB
    2. Y is the least significant bit, LSB
  • NOTE: The following files are for your trouble-shooting use only!
  • Simple Counter bsf file
  • Simple Counter v file
Family Settings
New Project Wizard, Family & Device Settings [page 3 of 5]
Sample instructions for creating SOF
  1. File > New Project Wizard
  2. Select device: 5CSEMA5F31C6
  3. File > New > Block Diagram/Schematic File
  4. File > New > Verilog HDL File
  5. Select File > Save As [simple_counter.v]
  6. Enter code into new "file.v"
  7. File > Save
  8. File > Create/Update > Create Symbol Files
  9. click Add Symbol on the toolbar, select Megawizard Plug-in Manager
  10. Place symbol on the bdf tab
  11. Processing > Start > Start Analysis & Elaboration
  12. Assignments > Pin Planner
  13. Tools > TimeQuest Timing Analyzer
  14. File > New SDC file
  15. enter commands; File > Save as my_first_fpga.sdc
  16. Start Compilation
  17. [plug in DE1-SoC board, connect USB-Blaster II connector to J13, and USB cable to PC]
  18. Tools > Programmer
  19. Click Auto Detect
  20. Select 5CSEMA5 and click OK
  21. Select SCSEMA5F31; click Change File
  22. Note: the FPGA is the SCSEMA5 icon
  23. Note: the HPS is the SOCVHPS icon
  24. Click on Program/Configure tab
  25. Press Start button
  26. Press and hold KEY[0] make LEDs advance quicker

Image showing USB Blaster-II and power connection to DE1-SoCUSB Blaster connector and Power

Assign DE1-SoC Hardware, Download SOF, and Program Device mp4 Video

Assign DE1-SoC Hardware, Download SOF, and Program Device Video

Assign DE1-SoC Hardware, Download and Run avi Video

Working zip of MyFirstFpga

Return to Main Section